Device and method for matching output impedance in signal transmission system

ABSTRACT

A signal transmission system includes a transmitter and a receiver connected via a transmission line. When a control circuit  103  in the transmitter  200  outputs a test signal to a transmission line  123 , a voltage detection section  112  in the receiver  210  determines whether a voltage value on a terminal  115  falls within a given range or not. Based on the result, the control signal generation section  113  generates an instruction as to whether or not to change the current amount of the driving current. The control circuit  103  in the transmitter  100  drives the transmission line  123  with the driving current increased or decreased based on the instruction, and again outputs a test signal. This process is repeated until the voltage on the terminal  115  of the receiver  210  comes into the range. As a result, an optimum output impedance for the control circuit  103  of the transmitter  200  can be obtained. When transmitting a signal via the line, matching is dynamically established between the output impedance of the driving circuit and that of the line, whereby a fast signal transmission can be realized.

TECHNICAL FIELD

The present invention relates to a technique of, when transmitting asignal between devices which are connected via a transmission line,establishing matching between the output impedance of a driving circuitfor driving the transmission line and the impedance of the transmissionline. In particular, the present invention relates to a technique ofoutput impedance adjustment for reducing waveform distortion caused byreflection at the time of signal transmission, and transmission of awaveform distortion detection signal.

BACKGROUND ART

When transmitting a signal between home appliances which are connectedvia a cable, or between semiconductor integrated circuits on a boardthat are connected via printed wiring, it is necessary to establishmatching between the output impedance of the driving circuit and theimpedance of the transmission line. The reason is that, if matching isnot established, waveform distortion will occur due to reflection of thetransmitted signal, thus hindering correct transmission of the signal.Furthermore, extra time is required until the signal reflection becomessubsided, thus making fast signal transmission difficult.

Conventionally, various methods for establishing matching between theoutput impedance of a driving circuit at the signal-transmitting end andthe impedance of a transmission line have been known. Japanese Laid-OpenPatent Publication No. 2003-8419, Japanese Laid-Open Patent PublicationNo. 10-261948, and Japanese Laid-Open Patent Publication No. 11-17518describe techniques of establishing impedance matching when transmittinga signal between semiconductor integrated circuits. To describe thecontent of Japanese Laid-Open Patent Publication No. 2003-8419 as anexample, separately in addition to a transmission line used for actualsignal transmission, a reference transmission line is provided in loopfashion and terminated at the semiconductor integrated circuit whichoutputs a signal, the reference transmission line having equivalentcharacteristics to those of the transmission line. By utilizing thereference transmission line to establish matching between the outputimpedance of the driving circuit and the impedance of the transmissionline, it is considered that impedance matching is also established withrespect to the actual transmission line.

However, the conventional impedance matching techniques have variousproblems.

A first problem is that there may be an error between thecharacteristics of the transmission line which is used for transmittingan actual signal and the characteristics of the reference transmissionline. In the case where the transmission line is a printed wiring board,naturally, the transmission line used for transmitting an actual signaland the reference transmission line are to be disposed at differentpositions on the printed wiring board. Even on the same printed wiringboard, depending on the position, there may be variations in thecharacteristics (dielectric constant and the like) which determineimpedance. Therefore, even if impedance matching is established by usingthe reference transmission line, optimal matching cannot be guaranteedwith respect to the impedance of the actual transmission line. In otherwords, even by using the reference transmission line, it is difficult todetermine the optimum impedance of the actual transmission line.

A second problem is that, since the reference transmission line must beprovided separately in addition to the transmission line used fortransmitting an actual signal, increases in area and volume may result.Especially in the case where there are plural signal transmission lines,and where precise impedance matching must be established, the samenumber or a close number of reference wiring patterns will have to beprovided corresponding to the plural transmission lines, thus resultingin a great increase in wiring area. Such would be contrary to the trendfor chip downsizing in the recent years, and therefore is impractical.

A third problem is that the aforementioned impedance matching techniquesare not applicable to impedance matching between home appliance deviceswhich are connected via a cable. In the case where a personal computer(PC) and a USB device are to be connected via a USB cable, for example,it will be impossible and impractical to provide a referencetransmission line. Moreover, since the home appliance devices to beconnected are diversified and it is impossible to establish impedancematching in advance, it will be necessary to establish impedancematching in a dynamic manner upon each connection. Especially in thecase where signals are to be rapidly transmitted between home appliancedevices, if matching between the impedance of a driving circuit and theimpedance of a cable cannot be established, fast transmission may not bepossible depending on the particular cable used, thus detracting fromreliability.

An objective of the present invention is to, when transmitting a signalvia a transmission line, establish matching between the output impedanceof a driving circuit and the impedance of the transmission line in adynamic manner, thus realizing fast signal transmission and improvingtransmission efficiency. Another objective of the present invention isto adapt the power consumption at the time of signal transmission to thetransmission line, thus reducing power consumption to the bear minimum.

DISCLOSURE OF INVENTION

A transmitter according to the present invention is to be connected to areceiver via a transmission line, the transmitter composing a signaltransmission system together with the receiver. The transmitterincludes: a communication section to be connected to a first end of thetransmission line; and a driving current control section for driving thetransmission line with a predetermined amount of driving current, thedriving current control section changing the current amount of thedriving current based on a control signal. As the control signal, thecommunication section receives from the receiver being connected to asecond end of the transmission line an instruction signal forinstructing whether or not to change the current amount of the drivingcurrent, the instruction signal being generated based on whether asignal value detected at the second end of the transmission line fallswithin a predetermined range or not. Thus, the aforementioned objectivesare attained.

If the signal value falls within the predetermined range, thecommunication section may receive as the control signal an instructionsignal instructing to stop changing the current amount of the drivingcurrent, and based on the control signal, the driving current controlsection may retain a present setting value of the current amount of thedriving current.

If the signal value is smaller than a lower limit value of thepredetermined range, the communication section may receive as thecontrol signal an instruction signal instructing to increase the drivingcurrent, and based on the control signal, the driving current controlsection may increase the driving current.

If the signal value is greater than an upper limit value of thepredetermined range, the communication section may receive as thecontrol signal an instruction signal instructing to decrease the drivingcurrent, and based on the control signal, the driving current controlsection may decrease the driving current.

The communication section may include a first terminal connected to thefirst end of the transmission line and a second terminal for beingconnected to a control signal line to receive the instruction signal,the control signal line being different from the transmission line.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and transmission of a signalfrom the driving current control section and reception of the controlsignal may be performed by time division.

An output impedance value when the driving current control sectiondrives the transmission line may be smaller than an output impedancevalue of the receiver outputting the instruction signal.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and a rate with which thedriving current control section transmits a signal may be faster than arate with which a signal is transmitted when the receiver outputs theinstruction signal.

The transmission line may be detachable from the communication section.

A receiver according to the present invention is to be connected to atransmitter via a transmission line, the receiver composing a signaltransmission system together with the transmitter. The transmitter isconnected to a first end of the transmission line. The receiverincludes: a communication section connected to a second end of thetransmission line, the communication section receiving a signal from thetransmission line being driven with a predetermined driving current; adetection section for detecting a signal value at the second end of thetransmission line based on the signal, and for generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; and a signal generation section for, based on thedetection signal, generating an instruction signal for instructingwhether or not to change the current amount of the driving current. Thecommunication section outputs the instruction signal to the transmitter.Thus, the aforementioned objectives are attained.

If a detection signal indicating that the signal value falls within thepredetermined range is generated by the detection section, the signalgeneration section may generate an instruction signal instructing tostop changing the current amount of the driving current.

If a detection signal indicating that the signal value is smaller than alower limit value of the predetermined range is generated by thedetection section, the signal generation section may generate aninstruction signal instructing to increase the driving current.

If a detection signal indicating that the signal value is greater thanan upper limit value of the predetermined range is generated by thedetection section, the signal generation section may generate aninstruction signal instructing to decrease the driving current.

The communication section may include a first terminal connected to thesecond end of the transmission line and a second terminal for beingconnected to a control signal line to output the instruction signal, thecontrol signal line being different from the transmission line.

The transmitter may be capable of transmitting a signal by driving thetransmission line with the predetermined driving current; and receptionof a signal from the transmission line and transmission of theinstruction signal may be performed by time division.

An output impedance value of the transmitter driving the transmissionline with the predetermined driving current may be smaller than anoutput impedance value from the terminal portion to the signalgeneration section.

A rate with which a signal is transmitted when the receiver outputs theinstruction signal may be slower than a rate with which the drivingcurrent control section transmits a signal by driving the transmissionline.

The transmission line may be detachable from the communication section.

A transmitting-end interface according to the present invention is to beused in a transmitter to be connected to a receiving-end interface of areceiver via a transmission line, the transmitter composing a signaltransmission system together with the receiver. The transmitting-endinterface includes: a communication section to be connected to a firstend of the transmission line; and a driving current control section fordriving the transmission line with a predetermined amount of drivingcurrent, the driving current control section changing the current amountof the driving current based on a control signal. As the control signal,the communication section receives from the receiver being connected toa second end of the transmission line an instruction signal forinstructing whether or not to change the current amount of the drivingcurrent, the instruction signal being generated based on whether asignal value detected at the second end of the transmission line fallswithin a predetermined range or not. Thus, the aforementioned objectivesare attained.

The communication section may include a first terminal connected to thefirst end of the transmission line and a second terminal for beingconnected to a control signal line to receive the instruction signal,the control signal line being different from the transmission line.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and transmission of a signalfrom the driving current control section and reception of the controlsignal may be performed by time division.

An output impedance value when the driving current control sectiondrives the transmission line may be smaller than an output impedancevalue of the receiver outputting the instruction signal.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and a rate with which thedriving current control section transmits a signal may be faster than arate with which a signal is transmitted when the receiver outputs theinstruction signal.

A receiving-end interface according to the present invention is to beused in a receiver to be connected to a transmitting-end interface of atransmitter via a transmission line, the receiver composing a signaltransmission system together with the transmitter. The transmitting-endinterface is connected to a first end of the transmission line. Thereceiving-end interface includes: a communication section connected to asecond end of the transmission line, the communication section receivinga signal from the transmission line being driven with a predetermineddriving current; a detection section for detecting a signal value at thesecond end of the transmission line based on the signal received at thecommunication section, and for generating a detection signal indicatingwhether the signal value falls within a predetermined range or not; anda signal generation section for, based on the detection signal,generating an instruction signal for instructing whether or not tochange the current amount of the driving current. The communicationsection outputs the instruction signal to the transmitter. Thus, theaforementioned objectives are attained.

The communication section may include a first terminal connected to thesecond end of the transmission line and a second terminal for beingconnected to a control signal line to output the instruction signal, thecontrol signal line being different from the transmission line.

The transmitter may be capable of transmitting a signal by driving thetransmission line with the predetermined driving current; and receptionof a signal from the transmission line and transmission of theinstruction signal may be performed by time division.

An output impedance value of the transmitter driving the transmissionline with the predetermined driving current may be smaller than anoutput impedance value from the terminal portion to the signalgeneration section.

A rate with which a signal is transmitted when the receiving-endinterface outputs the instruction signal may be slower than a rate withwhich the driving current control section transmits a signal by drivingthe transmission line.

An interface system comprising the aforementioned transmitting-endinterface and the aforementioned receiving-end interface may beconstructed, wherein the transmitting-end interface and thereceiving-end interface are connected via the transmission line.

A transmitting-end chip according to the present invention is to beconnected to a receiving-end chip via a transmission line, thetransmitting-end chip composing a signal transmission system togetherwith the receiving-end chip. The transmitting-end chip includes: acommunication section to be connected to a first end of the transmissionline; and a driving current control section for driving the transmissionline with a predetermined amount of driving current, the driving currentcontrol section changing the current amount of the driving current basedon a control signal. As the control signal, the communication sectionreceives from the receiver being connected to a second end of thetransmission line an instruction signal for instructing whether or notto change the current amount of the driving current, the instructionsignal being generated based on whether a signal value detected at thesecond end of the transmission line falls within a predetermined rangeor not. Thus, the aforementioned objectives are attained.

The communication section may include a first terminal connected to thefirst end of the transmission line and a second terminal for beingconnected to a control signal line to receive the instruction signal,the control signal line being different from the transmission line.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and transmission of a signalfrom the driving current control section and reception of the controlsignal may be performed by time division.

An output impedance value when the driving current control sectiondrives the transmission line may be smaller than an output impedancevalue of the receiver outputting the instruction signal.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and a rate with which thedriving current control section transmits a signal may be faster than arate with which a signal is transmitted when the receiver outputs theinstruction signal.

A receiving-end chip according to the present invention is to beconnected to a transmitting-end chip via a transmission line, thereceiving-end chip composing a signal transmission system together withthe transmitting-end chip. The transmitting-end chip is connected to afirst end of the transmission line. The receiving-end chip includes: acommunication section connected to a second end of the transmissionline, the communication section receiving a signal from the transmissionline being driven with a predetermined driving current; a detectionsection for detecting a signal value at the second end of thetransmission line based on the signal, and for generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; and a signal generation section for, based on thedetection signal received at the communication section, generating aninstruction signal for instructing whether or not to change the currentamount of the driving current. The communication section outputs theinstruction signal to the transmitter. Thus, the aforementionedobjectives are attained.

The communication section may include a first terminal connected to thesecond end of the transmission line and a second terminal for beingconnected to a control signal line to output the instruction signal, thecontrol signal line being different from the transmission line.

The transmitter may be capable of transmitting a signal by driving thetransmission line with the predetermined driving current; and receptionof a signal from the transmission line and transmission of theinstruction signal may be performed by time division.

An output impedance value of the transmitter driving the transmissionline with the predetermined driving current may be smaller than anoutput impedance value from the terminal portion to the signalgeneration section.

A rate with which a signal is transmitted when the receiving-end chipoutputs the instruction signal may be slower than a rate with which thedriving current control section transmits a signal by driving thetransmission line.

A chip-mounted board comprising the aforementioned transmitting-end chipand the aforementioned receiving-end chip may be constructed, whereinthe transmitting-end chip and the receiving-end chip are connected viathe transmission line.

An output impedance setting method according to the present inventionsets an output impedance of a transmitter which is connected to areceiver via a transmission line and composes a signal transmissionsystem together with the receiver. The transmitter includes: acommunication section to be connected to a first end of the transmissionline; and a driving current control section for driving the transmissionline, the receiver being connected to a second end of the transmissionline. The method includes the steps of: operating the driving currentcontrol section to drive the transmission line with a predeterminedamount of driving current; receiving, as a control signal forinstructing whether or not to change the current amount of the drivingcurrent, an instruction signal generated based on whether a signal valuedetected at the second end of the transmission line falls within apredetermined range or not; and changing the current amount of thedriving current based on the control signal. Thus, the aforementionedobjectives are attained.

The communication section may include a first terminal connected to thefirst end of the transmission line and a second terminal connected to acontrol signal line, the control signal line being different from thetransmission line; and the step of receiving may receive the instructionsignal at the second terminal.

The step of driving may operate the driving current control section totransmit a signal by driving the transmission line, and a step ofperforming, by time division, transmission of a signal from the drivingcurrent control section and reception of the control signal may befurther comprised.

An output impedance value when the driving current control sectiondrives the transmission line may be smaller than an output impedancevalue of the receiver outputting the instruction signal.

The step of driving may operate the driving current control section totransmit a signal by driving the transmission line; and a rate withwhich the driving current control section transmits a signal may befaster than a rate with which a signal is transmitted when the receiveroutputs the instruction signal.

An output impedance setting, assisting method according to the presentinvention is to be used in a receiver which is connected to atransmitter via a transmission line and composes a signal transmissionsystem together with the transmitter. The transmitter is connected to afirst end of the transmission line, the receiver including: acommunication section connected to a second end of the transmissionline; and a detection section for detecting a signal value at apredetermined position. The method includes the steps of: receiving, viathe communication section, a signal from the transmission line beingdriven with a predetermined driving current; detecting, by using thedetection section, a signal value at the second end of the transmissionline based on the signal; generating a detection signal indicatingwhether the signal value falls within a predetermined range or not;based on the detection signal, determining whether or not to change thecurrent amount of the driving current with which the transmission lineis driven; generating an instruction signal indicating the result ofdetermination; and outputting the instruction signal to the transmittervia the communication section. Thus, the aforementioned objectives areattained.

The communication section may include a first terminal connected to thesecond end of the transmission line and a second terminal connected to acontrol signal line, the control signal line being different from thetransmission line; and the step of receiving may receive the instructionsignal at the second terminal.

The transmitter may be capable of transmitting a signal by driving thetransmission line with the predetermined driving current, and a step ofperforming, by time division, reception of a signal from thetransmission line and transmission of the instruction signal may befurther comprised.

An output impedance value of the transmitter driving the transmissionline with the predetermined driving current may be smaller than anoutput impedance value from the terminal portion to the signalgeneration section.

A rate with which a signal is transmitted when the receiver outputs theinstruction signal may be slower than a rate with which the drivingcurrent control section transmits a signal by driving the transmissionline.

A computer program according to the present invention is to be executedin a transmitter which is connected to a receiver via a transmissionline and composes a signal transmission system together with thereceiver. The transmitter includes: a communication section to beconnected to a first end of the transmission line; and a driving currentcontrol section for driving the transmission line, the receiver beingconnected to a second end of the transmission line. The computer programincludes the steps of: operating the driving current control section todrive the transmission line with a predetermined amount of drivingcurrent; receiving of causing the communication section to receive, as acontrol signal for instructing whether or not to change the currentamount of the driving current, an instruction signal generated at thereceiver based on whether a signal value detected at the second end ofthe transmission line falls within a predetermined range or not; andchanging the current amount of the driving current based on the controlsignal. Thus, the aforementioned objectives are attained.

The communication section may include a first terminal connected to thefirst end of the transmission line and a second terminal connected to acontrol signal line, the control signal line being different from thetransmission line; and the instruction signal may be received at thesecond terminal.

The driving current control section may be capable of transmitting asignal by driving the transmission line, and the transmitter may becaused to perform, by time division, transmission of a signal from thedriving current control section and reception of the control signal.

An output impedance value when the driving current control sectiondrives the transmission line may be smaller than an output impedancevalue of the receiver outputting the instruction signal.

The driving current control section may be capable of transmitting asignal by driving the transmission line; and a rate with which thedriving current control section transmits a signal may be faster than arate with which a signal is transmitted when the receiver outputs theinstruction signal.

A computer program according to the present invention is to be executedin a receiver which is connected to a transmitter via a transmissionline and composes a signal transmission system together with thetransmitter. The transmitter is connected to a first end of thetransmission line, the receiver including: a communication sectionconnected to a second end of the transmission line; and a detectionsection for detecting a signal value at a predetermined position. Thecomputer program includes the steps of: receiving, via the communicationsection, a signal from the transmission line being driven with apredetermined driving current; detecting, by using the detectionsection, a signal value at the second end of the transmission line basedon the signal; generating a detection signal indicating whether thesignal value falls within a predetermined range or not; based on thedetection signal, determining whether or not to change the currentamount of the driving current with which the transmission line isdriven; generating an instruction signal indicating the result ofdetermination; and outputting the instruction signal to the transmittervia the communication section. Thus, the aforementioned objectives areattained.

The communication section may include a first terminal connected to thesecond end of the transmission line and a second terminal connected to acontrol signal line, the control signal line being different from thetransmission line; and the instruction signal may be received at thesecond terminal.

The transmitter may be capable of transmitting a signal by driving thetransmission line with the predetermined driving current, and thereceiver may be caused to perform, by time division, reception of asignal from the transmission line and transmission of the instructionsignal.

An output impedance value of the transmitter driving the transmissionline with the predetermined driving current may be smaller than anoutput impedance value from the terminal portion to the signalgeneration section.

A rate with which a signal is transmitted when the receiver outputs theinstruction signal may be slower than a rate with which the drivingcurrent control section transmits a signal by driving the transmissionline.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1( a) and (b) show variations of signal transmission systems 1,where (a) is a diagram showing the constitution of a signal transmissionsystem 1 having a PC 100 and a hard disk drive 110, and FIG. 1( b) is adiagram showing the constitution of a signal transmission system 1 on aprinted wiring board, which includes a plurality of semiconductorintegrated circuits 100 and 110.

FIG. 2 is a block diagram showing the functional constitution of asignal transmission system 1 according to Embodiment 1.

FIG. 3 is a circuit diagram of a driving current control circuit 103 ofa transmitter 100.

FIG. 4 is a block diagram showing the constitution of a driving currentcontrol signal reception section 104.

FIG. 5 is a block diagram showing the constitution of a voltagedetection section 112 and a driving current control signal generationsection 113 of a receiver 110.

FIG. 6 is a circuit diagram showing the constitution of a drivingcurrent generation circuit 117.

FIGS. 7( a) to (d) are diagrams showing transient voltage waveforms atthe receiver 110 side, which are in accordance with the relationshipbetween the output impedance of the driving current control circuit 103and the impedance of the transmission line 121.

FIG. 8 is a flowchart showing the procedure of an impedance matchingprocess in the signal transmission system 1.

FIG. 9 is a block diagram showing the functional constitution of asignal transmission system 2 according to Embodiment 2.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, with respect to the accompanying drawings, embodiments ofan impedance matching process according to the present invention will bedescribed.

(Embodiment 1)

FIGS. 1( a) and (b) show variations of signal transmission systems 1, towhich the impedance matching process according to the present embodimentis applicable.

FIG. 1( a) shows the constitution of a signal transmission system 1including a PC 100 and a hard disk drive 110. Herein, it is assumed thatthe PC 100 and the hard disk drive 110 each has an interface based onthe USB2.0 standard.

When a USB cable 120 is inserted in connectors of the PC 100 and thehard disk drive 110, connection is established in accordance with aprocedure based on the USB2.0 standard. Once the PC 100 and the harddisk drive 110 are connected via the USB cable 120, the signaltransmission system 1 is constructed.

After the signal transmission system 1 is constructed, based on aprocess according to the present embodiment, the PC 100 and the harddisk drive 110 establish matching between the output impedance of adriving current control circuit (not shown) which is provided in theinterface of the signal-transmitting device (PC 100) and the impedanceof the USB cable 120. Since a signal is also transmitted from the harddisk drive 110 to the PC 100, matching is similarly established betweenthe output impedance of a driving current control circuit which isprovided in the interface of the signal-transmitting device (hard diskdrive 110) and the impedance of the USB cable 120. Thereafter, based ona scheme compliant with the USB2.0 standard, signals are exchangedbetween the PC 100 and the hard disk drive 110 at a transmission speedof 480 Mbps, for example.

FIG. 1( a) illustrates an exemplary case where the signal transmissionsystem 1 is constructed by using the PC 100 and the hard disk drive 110.However, instead of a PC and a hard disk drive, various other types ofdevices, e.g., a digital camera, a DVD drive, and the like, may be usedto construct the signal transmission system 1. Moreover, FIG. 1( a)illustrates an exemplary case where the signal transmission system 1 isconstructed via connection based on the USB2.0 standard, using the USBcable 120 as a transmission line. However, instead of the USB2.0standard, any other communication standard or protocol, e.g., theIEEE1394 standard, SCSI standard, or HDMI (High-Definition MultimediaInterface) standard, may be used to construct the signal transmissionsystem 1.

FIG. 1( b) shows the constitution of a signal transmission system 1where a plurality of semiconductor integrated circuits 100 and 110 areprovided on a printed wiring board. In the figure, semiconductorintegrated circuits 100 and 110 are semiconductor chips. Once thesemiconductor integrated circuit 100 and the semiconductor integratedcircuit 110 are connected to each other via a printed wiring 120, whichis a transmission line, the signal transmission system 1 is constructed.The semiconductor integrated circuits 100 and 110 perform abelow-described process to establish matching between the impedance ofthe driving current control circuit (not shown) of the semiconductorintegrated circuit 100 or 110 and the impedance of the printed wiring120. Similarly to FIG. 1( a), if a driving current control circuit isprovided in each of the semiconductor integrated circuits 100 and 110,matching is to be established between the output impedance of each andthe impedance of the printed wiring 120. As a result, it becomespossible to perform a fast signal transmission between the semiconductorintegrated circuit 100 and the semiconductor integrated circuit 110 viathe printed wiring 120, whereby transmission efficiency is improved.

FIG. 1( b) illustrates an example where the signal transmission system 1is constructed from the semiconductor integrated circuits 100 and 110 ona printed wiring board. However, a signal transmission system 1 can alsobe constructed between specific circuits which are integrated on asingle chip.

In either one of the signal transmission systems 1 shown in FIGS. 1( a)and (b), after establishing impedance matching, impedance matchingprocesses are repetitively executed at a predetermined time interval(e.g., at an interval of several seconds to several tens of seconds),thus being able to re-establish impedance matching in a dynamic manner.As a result, impedance mismatching occurring due to changes in thesupplied source voltage, temperature changes, and the like can beeliminated.

Moreover, in the signal transmission system 1 shown in FIGS. 1( a) and(b), the impedance matching process according to the present embodimentis to be performed between the PC and the hard disk drive, and betweenthe semiconductor integrated circuits. More specifically, however, therespective interface sections which are provided in the PC, the harddisk drive, and the semiconductor integrated circuits perform thematching process. Such interfaces are capable of executing the processaccording to the present embodiment, and are able to form the interfacesystem 1, which is a signal transmission system.

Hereinafter, the constitution and process for executing the process ofestablishing impedance matching according to the present embodiment willbe described.

First, the constitution of the signal transmission system 1 will bedescribed with reference to FIG. 2. As described above, variousimplementations are possible for the signal transmission system 1.Therefore, the descriptions below will assume that the signaltransmission system 1 includes a transmitter 100 which transmits asignal and a receiver 110 which receives a signal. However, that is notto say that the transmitter 100 is unable to receive a signal. Thetransmitter 100 may include the function of the receiver 110, and thereceiver 110 may include the function of the transmitter 100. Moreover,the signal transmission system 1 may include three or more devices. Inthat case, FIG. 2 can be regarded as illustrating specific two oftransmitters and receivers which perform signal exchange.

FIG. 2 shows the structure of the functional block of the signaltransmission system 1 according to the present embodiment. The signaltransmission system 1 includes a transmitter 100 and a receiver 110. Thetransmitter 100 and the receiver 110 are connected via two transmissionlines 121 and 122 which transmit different signals. Between thesetransmission lines, the value of an impedance Z which is defined withrespect to the transmission line 121 exerts an influence when rapidlytransmitting a signal from the transmitter 100 to the receiver 110. Onthe other hand, the transmission line 122 is utilized as a controlsignal line for transmitting a control signal from the receiver 110 tothe transmitter 100. The signal transmission via the transmission line122 is slower than the signal transmission which is performed via thetransmission line 121. Therefore, the waveform distortion which occursdue to reflection of the signal transmitted, and the time which isrequired until signal reflection becomes subsided, are not asproblematic as in the case of fast transmission. In other words, theimpedance present in the transmission line 122 is not a particularproblem. Note that the transmission lines 121 and 122 may be realized asa single cable in which a plurality of transmission lines are bundledtogether.

Hereinafter, the respective constituent elements of the transmitter 100will be described, and thereafter the respective constituent elements ofthe receiver 110 will be described.

The transmitter 100 includes an internal circuit 101, an output buffer102, a driving current control circuit 103, a driving current controlsignal reception section 104, a signal output terminal 105, and a signalinput terminal 106.

The internal circuit 101 is a circuit which realizes functions that arespecific to the transmitter 100, and outputs a signal to be transmittedto the receiver 110, and the like. For example, in the case where thetransmitter 100 is the PC in FIG. 1( a), the internal circuit 101 maybroadly be a CPU, a memory, or any other semiconductor chip, etc.,mounted on a mother board. Furthermore, in the case where thetransmitter 100 is a device (an interface card or the like) whose mainfunction is an interfacing function, the internal circuit 101 is acircuit for securing connection with a device in which the circuit 101is implemented. Moreover, in the case where the transmitter 100 is asemiconductor integrated circuit in FIG. 1( b), the internal circuit 101is a calculation circuit or the like which performs predeterminedcalculations.

The internal circuit 101 sends a predetermined test pattern signal tothe output buffer 102. The output buffer 102 temporarily stores thesignal which has been output from the internal circuit 101, and outputsa signal which repetitively changes between a low level and a highlevel.

The driving current control circuit (hereinafter referred to as the“control circuit”) 103 drives the transmission line 121 with apredetermined driving current, thus outputting onto the transmissionline 121 a signal which is in accordance with the signal having beenoutput from the output buffer 102. Moreover, the control circuit 103receives the control signal, and changes the current amount of thedriving current based on the control signal. The specific constitutionof the control circuit 103 will be described later with reference toFIG. 3.

The driving current control signal reception section (hereinafterreferred to as the “reception section”) 104 receives a signal which isreceived at the signal input terminal 106, subjects it to apredetermined conversion, and outputs a control signal. The signalreceived by the reception section 104 is an instruction signal from anexternal device (the receiver 110) designating a predeterminedoperation, and the signal output therefrom is a control signal forcontrolling the operations of the constituent elements in thetransmitter 100. The specific constitution of the reception section 104will be described later with reference to FIG. 4.

The signal output terminal 105 and the signal input terminal 106 arecommunication sections, each of which directly outputs and receives asignal when the transmitter 100 performs external communications. Thesignal output terminal 105 is connected to one end of the transmissionline 121. The signal output terminal 105 outputs the signal from thecontrol circuit 103 onto the transmission line 121. Moreover, the signalinput terminal 106 is connected to one end of the transmission line 122.The signal input terminal 106 receives a signal via the transmissionline 122.

Next, the constitution of the receiver 110 will be described. Thereceiver 110 includes an internal circuit 111, a voltage detectionsection 112, a driving current control signal generation section 113, anoutput buffer 114, a signal input terminal 115, a signal output terminal116, and a driving current generation circuit 117.

The internal circuit 111 is circuitry for realizing functions that arespecific to the receiver 110, and processes a signal which is receivedfrom the transmitter 100. For example, in the case where the receiver110 is the hard disk drive in FIG. 1( a), the internal circuit 111 maybroadly be a signal processing LSI for a hard disk drive, a buffer, adriving circuit for an access arm or a spindle motor, and the like.Furthermore, in the case where the receiver 110 is a device (aninterface card or the like) whose main function is an interfacingfunction, the internal circuit 111 is a circuit for securing connectionwith a device in which the circuit 111 is implemented. Moreover, in thecase where the receiver 110 is a semiconductor integrated circuit inFIG. 1( b), the internal circuit 111 is a calculation circuit or thelike which performs predetermined calculations.

The voltage detection section 112 detects a voltage value on the signalinput terminal 115 with a certain timing based on changes in the inputvoltage, and generates one or more voltage detection signals whichindicate whether the voltage value falls within a predetermined range ornot. The predetermined range is defined by at least two determinationreference values. For example, the voltage detection signals include asignal indicating whether it is greater than a first determinationreference value or not, and a signal indicating whether it is greaterthan a second determination reference value or not. As a result, it ispossible to determine whether the voltage value falls within that rangeor the voltage is greater or smaller than that range. The specificconstitution of the voltage detection section 112 will be describedlater with reference to FIG. 5. Although FIG. 2 illustrates the voltagedetection section 112 as directly detecting the voltage on the signalinput terminal 115, the voltage detection section 112 does not need todetect the voltage directly. Moreover, any other electricalcharacteristics of the transmission line 121 besides the voltage value,e.g., an electric power value, a current value, or the like, may bedetected.

The driving current control signal generation section (hereinafterreferred to as the “control signal generation section”) 113 receives thevoltage detection signals, and generates an instruction signal based onthese signals. The instruction signal is a signal for instructing thecontrol circuit 103 of the transmitter 100 whether or not to change thecurrent amount of the driving current. The specific constitution of thecontrol signal generation section 113 will be described later withreference to FIG. 5. The output buffer 114 temporarily stores the signalwhich is output from the internal circuit 101, and outputs it to thedriving current generation circuit 117.

The driving current generation circuit 117 receives the instructionsignal from the output buffer 114, and drives the transmission line 122with a predetermined driving current, thus outputting the instructionsignal.

The signal input terminal 115 and the signal output terminal 116 arecommunication sections, each of which directly receives and outputs asignal when the receiver 110 performs external communications. Thesignal input terminal 115 is connected to another end of thetransmission line 121, and receives a signal via the transmission line121. The signal output terminal 116 is connected to another end of thetransmission line 122. The signal output terminal 116 outputs the signalfrom the driving current generation circuit 117 onto the transmissionline 122.

Next, a more specific constitution of each of the above-describedconstituent elements will be described.

FIG. 3 shows a circuit constitution of the control circuit 103 of thetransmitter 100. The control circuit 103 receives on a signal line 301 asignal which has been output from the output buffer 102, and outputsfrom a signal line 302 a signal having a timing which is defined inaccordance with that signal.

The control circuit 103 includes control signal input terminals 303,output driving ability adjustment transistors 304, a Low voltage outputtransistor 305, a High voltage output transistor 306, and a power source307. The signal line 301 is connected to gate electrodes of thetransistors 305 and 306. The output driving ability adjustmenttransistors 304 is connected in series to the Low voltage outputtransistor 305 and the High voltage output transistor 306. To the outputdriving ability adjustment transistors 304, a ground voltage or thevoltage of the power source 307 is applied at the source electrodes ofthe transistors 304, depending on whether the signal applied to thesignal line 301 is at a high level or a low level. The respective gateelectrodes of the transistors 304 are connected to the control signalinput terminals 303, and a control signal from the reception section 104is applied thereto. The control signal is parallel signals which areindividually input to the respective transistors 304. As a result, anytransistor among the transistors 304 can be selectively on or off. Thevoltage on the drain electrode of any transistor that has been turned onis equal to the voltage of the power source 307 or the ground voltage.Moreover, a predetermined current is output via the signal line 302.Based on the above operation principle, the number of transistors toconduct is controlled in the control circuit 103 based on the controlsignal, thus making it possible to change the output impedance of thecontrol circuit 103. Note that, the driving ability of the controlcircuit 103 is prescribed so as to have an adjustment range which isequal to or greater than the impedance widths of various transmissionlines which are expected to be actually driven.

Next, FIG. 4 shows a block constitution of the reception section 104. Asignal line 501 transmits a serial data signal 501 which is received viathe signal input terminal 106. A serial/parallel conversion circuit(hereinafter referred to as the “S/P conversion circuit”) 502 convertsserial data into parallel data. The retention circuit 503 retains thisparallel data, and outputs the retained parallel data. The parallel datais output to the control signal input terminals 303 of the controlcircuit 103 as a control signal.

FIG. 5 shows a functional block constitution of the voltage detectionsection 112 and the control signal generation section 113 of thereceiver 110. Firstly, the voltage detection section 112 includesflip-flops (hereinafter referred to as the F/Fs) 401 and 402,comparators 403, 404, and 405, and a delay circuit 406. Via a signalline 411, the voltage detection section 112 receives a signal on thetransmission line 121 at the signal input terminal 115. The comparators403, 404, and 405 are connected in parallel to the signal line 411, andsimultaneously receive the signal on the signal input terminal 115. Thecomparators 403, 404, and 405 also receive reference voltages VREF1,VREF2, and VREF3, via signal lines 407, 408, and 409, respectively. Itis assumed herein that VREF1<VREF2<VREF3. The comparator 403 comparesthe voltage value of the incoming signal against the reference voltageVREF1, and outputs whichever signal is greater. As the reference voltageVREF1, for example, an earliest lowest initial voltage at the input endmay be calculated from the expected impedance width of the transmissionline 121 and impedance variable range of the driving current controlcircuit, and determined as the greatest voltage in a range which allowsdetection of its amplitude. Similarly, the comparators 404 and 405compare the voltage of the incoming signal against the reference voltageVREF2 and compare the voltage of the incoming signal against VREF3, andeach output whichever signal is greater.

The reference voltages VREF2 and VREF3 can be determined in relation tothe driving performance of the transmitter 100 to which the receiver 110is to be connected. Specifically, VREF2 and VREF3 are prescribed so thatVREF2<V<VREF3, given a voltage V of the power source 307 of the controlcircuit 103 (FIG. 3). Since the driving voltage of any connectabletransmitter 100 is known in advance, it is possible to set the values ofthe reference voltages VREF2 and VREF3 at the time of manufacture, etc.,of the receiver 110. Note that the values of the reference voltagesVREF1 to 3 may be externally input.

The outputs of the comparators 403 and 404 are connected to theflip-flops 401 and 402 (hereinafter referred to as “F/Fs”). The F/Fs 401and 402 operate based on a sampling signal which is output from thedelay circuit 406. Upon receiving a signal having a voltage which isequal to or greater than the reference voltage VREF1, the delay circuit406 retains the signal for a predetermined time and then outputs thesignal. In other words, the input is delayed before being output. Thisoutput is the sampling signal. Based on the sampling signal, the F/Fs401 and 402 will have “0” set thereto when the voltage received via thesignal line 411 is smaller than the reference voltage, and “1” whengreater. The values set in the F/Fs 401 and 402 are output as voltagedetection signals.

The outputs from the F/Fs 401 and 402 are input to a retention circuit452 via a counter circuit 451 which is inside the control signalgeneration section 113, and further the outputs from the retentioncircuit 452 is input to a parallel/serial conversion circuit(hereinafter referred to as the P/S conversion circuit) 453. Morespecifically, the counter circuit 451 in the control signal generationsection 113 receives the voltage detection signals which are output fromthe voltage detection section 112, and operates as follows. If theoutputs of the F/Fs 401 and 402 are “0”,“0”, the counter circuit 451generates an instruction signal for increasing the number of transistorsto be driven, by one, among the transistors 304 which are provided inthe control circuit 103. Conversely, if the outputs of the F/Fs 401 and402 are “1”,“1”, it generates an instruction signal for decreasing thenumber of transistors to be driven, by one, among the transistors 304which are provided in the control circuit 103. Moreover, if the outputsof the F/Fs 401 and 402 are “0”,“1”, it outputs a signal for stoppingthe driving ability control operation of the control circuit 103. Theinstruction signal which has been output is retained in the retentioncircuit 452, and then output. The P/S conversion circuit 453 convertsthe instruction signal having been output from the retention circuit 452into a serial data signal, and outputs it onto a signal line 454.

Next, FIG. 6 shows the circuit constitution of the driving currentgeneration circuit 117. Similarly to the control circuit 103, thedriving current generation circuit 117 is provided in order to drive atransmission line; therefore, its constitution is similar to theconstitution of the control circuit 103. Unlike the control circuit 103,one transistor 704 is provided as an output stage transistor. The reasonwhy there is one transistor 704, as opposed to a plurality of them, isthat there is no need to fine-adjust the current value which isnecessary for driving the transmission line 122. A gate electrode of thetransistor 704 is connected to a control signal input terminal 703, suchthat the output transistor 704 can be switched between an on; state andan off state based on a signal which is input to the terminal 703.Herein, however, the on state is always maintained. Note that gateelectrodes of the transistors 705 and 706 are connected to a signal line701 so that the output voltage is changed when an output signal from theoutput buffer 114 is applied, such constitution being similar to that ofthe control circuit 103. Moreover, the output transistor 704 isconnected in series to the Low voltage output transistor 705 and theHigh voltage output transistor 706, such constitution also being similarto that of the control circuit 103. The driving current generationcircuit 117 drives the transmission line 122 with a predetermineddriving current, thus outputting an instruction signal via the signaloutput terminal 116. As described above, the instruction signal isconverted at the reception section 104 of the transmitter 100 intoparallel data so as to be utilized as a control signal.

Now, with reference to FIG. 7, the influence which the driving ability(output impedance) of the driving current output circuit 103 exerts onthe distortion of the transmission signal waveform will be described,and an operation which is required of the control circuit 103 in view ofthis influence will be described.

FIGS. 7( a) to (d) are diagrams showing transient voltage waveforms atthe receiver 110 side, which are in accordance with the relationshipbetween the output impedance of the driving current control circuit 103and the impedance of the transmission line 121. Items which are commonto FIGS. 7( a) to (d) will be described. Firstly, time ts is a point intime at which the reference voltage VREF1 is first exceeded on thesignal input terminal 115. Time tp is a point in time after the lapse ofa predetermined time from time ts. A “predetermined time” is a time bywhich the delay circuit 406 in the voltage detection section 112 shownin FIG. 5 delays its output.

FIG. 7( a) shows a transient voltage waveform 601 on the signal inputterminal 115 in the case where the output impedance value of the drivingcurrent output circuit 103 is greater than the impedance value of thetransmission line 121. Voltage measurement begins at time tp. Thevoltage at time tp (hereinafter referred to as the “initial voltage” atthe input end) is below the reference voltages VREF2 and VREF3. Thevoltage detection section 112 sequentially detects voltage at times t2,t3 and t4, until detecting, at time t4, the voltage falling into therange defined by the reference voltages VREF2 and VREF3. For example, inthe case where the transmission frequency is 1 GHz, the interval betweentimes t1 and t2 is 1 nanosecond. It is assumed that time tp is a pointin time between times t1 and t2.

FIG. 7( b) shows a transient voltage waveform 602 on the signal inputterminal 115 in the case where the output impedance value is smallerthan in FIG. 7( a). By decreasing the output impedance value to increasethe driving ability, the reference voltage VREF1 is far exceeded at theinitial voltage at the input end, but the reference voltage VREF2 is notreached. The point in time at which the voltages VREF2 and VREF3 arereached is time t3.

FIG. 7( c) shows a transient voltage waveform 603 on the signal inputterminal 115 in the case where the output impedance value is smallerthan in FIG. 7( b). By further decreasing the output impedance value toincrease the driving ability, at time t1, the initial voltage at theinput end has reached a voltage which is intermediate between thereference voltages VREF2 and VREF3. At time t1 and later, too, thevoltage stays stable. The point in time at which stability is attainedis clearly earlier than in the examples of FIGS. 7( a) and (b).

FIG. 7( d) shows a transient voltage waveform 604 on the signal inputterminal 115 in the case where the output impedance value is smallerthan in FIG. 7( c). The initial voltage at the input end exceeds thereference voltages VREF2 and VREF3 at time t1. However, the voltageconversely becomes lower than the voltage VREF2 at time t2 (hereinaftersuch a waveform state will be referred to as waveform distortion).Thereafter, the voltage again exceeds the reference voltages VREF2 andVREF3 at time t3, and at time t4 and later, it converges at a voltagewhich is intermediate between the reference voltages VREF2 and VREF3.

Thus, it can be said that the internal circuit 111 of the receiver 110is able to receive a signal which is output from the output buffer 102of the transmitter 100 at the earliest time and with the greatestcertainty in the case of the waveform 603 of FIG. 7( c). From the above,it can be said that an optimum transmission waveform is obtained on thesignal input terminal 115 if the initial voltage at the input end is apotential which is intermediate between VREF2 and VREF3.

Hereinafter, with reference to FIG. 2 and FIG. 8, an impedance matchingprocess which is performed in the signal transmission system 1 will bedescribed. This process is performed under control of communicationcontrollers (not shown) in the transmitter 100 and the receiver 110, forexample. Each communication controller gives instructions to therespective constituent elements by analyzing and executing a program inan EEPROM or the like. The following description will illustrate aprocess to be executed when, connection between the transmitter 100 andthe receiver 110 having been established, a fast signal transmission isbegun.

In the present embodiment, the output impedance of the control circuit103 is set maximum in an initial state which exists before thetransmitter 100 begins a signal transmission (e.g., immediately afterthe power of the transmitter 100 is activated). This is synonymous tomaking the driving ability minimum. It is assumed that the inputimpedance on the signal input terminal 115 of the receiver 110 isinfinite.

FIG. 8 is a flowchart showing the procedure of an impedance matchingprocess in the signal transmission system 1. Blocks on the left-handside of the figure are the operation of the transmitter, whereas theblocks on the right-hand side are the operation of the receiver. As willbecome clear from the following, in the signal transmission system 1,the receiver has a function of assisting in the setting of the outputimpedance of the transmitter 100.

First, the internal circuit 101 of the transmitter 100 generates a testpattern signal at step 801. Based on this test pattern signal, theoutput buffer 102 outputs a signal which repetitively switches between alow level and a high level. At step 802, the control circuit 103 firstdrives the transmission line with a minimum driving current, thusoutputting a signal which is based on the test pattern signal.

Then, at step 803, the voltage detection section 112 detects an initialvoltage on the signal input terminal 115 of the receiver 110 which isconnected to the transmission line 121. The detection is performed attime tp (FIG. 6) which is delayed from ts, i.e., a point in time atwhich the reference voltage VREF1 is reached responsive to a transitionof the output from the low level to the high level.

At step 804, the voltage detection section 112 determines whether thedetected voltage value is within the optimum reception level range. Thisdetermination is a determination as to whether the waveform and voltagevalue of the initial voltage on the signal input terminal 115 exhibit astate as shown in FIG. 7( c) or not. If the optimum range as shown inFIG. 7( c) has not been entered, control proceeds to step 805; if therange has been entered, control proceeds to step 807.

At step 805, the two F/Fs 401 and 402 in the voltage detection section112 output “0” and “0”. Based on this output signal, the control signalgeneration section 113 generates an instruction signal. The instructionsignal, which is a signal that instructs to increase the drivingcurrent, is sent to the transmitter 100 via the output buffer 114 andthe driving current generation circuit 117. The reception section 104generates a control signal from the received instruction signal, and atstep 806, the control circuit 103 drives the transmission line 121 witha driving current which is increased by one step based on the controlsignal, and again outputs a signal which is based on the test patternsignal. The receiver 110 performs a process of detecting an initialvoltage on the signal input terminal 115, and repeats the process fromstep 803 on.

On the other hand, at step 807, the control signal generation section113 generates an instruction signal, and instructs the transmitter 100to stop changing (increasing) the driving current. This means fixing thenumber of output stage transistors which are currently being driven. Thecontrol signal generation section 113 retains data specifying thisnumber in the retention circuit 452 provided in the control circuit,e.g., a flip-flop or a RAM. Note that, at this time, the two F/Fs 401and 402 in the voltage detection section 112 output “0” and “1”, thusindicating that the output impedance of the control circuit 103 has anoptimum value.

At step 808, the control circuit 103 retains the present setting valueof the current amount of the driving current, and drives thetransmission line 121 with a driving current which is based on thissetting value. Through the above process, the impedance matching processby the control circuit 103 which is in accordance with the relationshipbetween the output impedance and the impedance of the transmission line121 is ended.

In the present embodiment, by controlling in the control circuit 103 thenumber of transistors to conduct, the output impedance of the controlcircuit 103 is changed until the initial voltage that is detected at thereceiver 110 falls into a predetermined range. Once the initial voltagedetected at the receiver 110 falls into the predetermined range, theoutput impedance of the control circuit 103 is set optimally, and itbecomes possible to perform transmission of an actual signal with awaveform which is free of distortion, as indicated by the waveform 603of FIG. 7( c). The transmission lines 121 and 122 may be detachable,e.g., a USB cable, or printed wiring which is affixed on aprinted-circuit board.

Thus, an impedance matching process which is performed in the signaltransmission system 1 has been described. Although the above descriptionassumes that the output driving ability is adjusted at the rise of asignal, it would also be possible to make an adjustment at the fall of asignal. In this case, the procedure would be similar except that thedetermination values would be different. Moreover, although thedescription assumed that the output impedance of the control circuit 103is maximum (i.e., the driving ability of the transmission line 121 isminimum) at the start of the process, it would also be possible to setthe output impedance at minimum (i.e., the driving ability is maximum).In the case where the process is begun with the output impedance in theinitial state being set at minimum, the output impedance is to beincreased through subsequent control.

Note that the present embodiment employs the P/S conversion circuit 453and the S/P conversion circuit 502, and serial data is used for thetransmission of a driving current control signal. However, it is notlimited to serial data. Transmission data of any format may be used solong as the drive reception section 104 is able to receive the outputfrom the retention circuit 452. Furthermore, the above descriptionassumes that the impedance adjustment is performed based on a testpattern signal from the internal circuit 101. However, instead of a testpattern signal, the aforementioned process may be performed by utilizingthe rise and fall, etc., of a signal during actual data transfer. Forexample, when establishing connection between the transmitter 100 andthe receiver 110, impedance matching may be realized by utilizing theaforementioned test pattern signal, and after data transmission isbegun, impedance matching may be re-established in a dynamic manner byutilizing at least one of the rise and fall of the data which is undertransmission, at a predetermined time interval.

(Embodiment 2)

FIG. 9 shows the structure of functional blocks of signal transmissionsystem 2 according to the present embodiment. As in the signaltransmission system 1 according to Embodiment 1, the signal transmissionsystem 2 is also realized in implementations of FIGS. 1( a) and (b). Thefollowing description assumes that the signal transmission system 2includes a transmitter 200 which transmits a signal and a receiver 210which receives a signal. However, that is not to say that thetransmitter 200 is unable to receive a signal. The transmitter 200 mayinclude the function of the receiver 210, and the receiver 210 mayinclude the function of the transmitter 200.

The signal transmission system 2 includes the transmitter 200 and thereceiver 210. Unlike the signal transmission system 1 of Embodiment 1,the transmitter 200 and the receiver 210 are connected via a singletransmission line 123 which transmits signals. Since the value of animpedance Z which is defined with respect to the transmission line 123exerts an influence when rapidly transmitting a signal from thetransmitter 200 to the receiver 210, it is necessary to establishmatching between the output impedance of a driving circuit in thetransmitter 200 and the impedance of the transmission line 123.

In the following, the transmitter 200 will be first described, and thenthe receiver 210 will be described. Among the elements composing thetransmitter 200 and the receiver 210, any element that basically has thesame function as that of a constituent element in the transmitter 100and the receiver 110 of FIG. 2 will be denoted by the same referencenumeral, and the detailed description thereof will be omitted. Wheneverany special description is given, it is to be understood that a functionassociated with such description is additionally comprised.

The transmitter 200 includes an internal circuit 101, an output buffer102, a control circuit 103, a reception section 104, and a signalinput/output terminal 205. The signal input/output terminal 205 is acommunication section which directly exchanges signals when thetransmitter 200, performs external communications. The signalinput/output terminal 205, which is connected to one end of thetransmission line 123, outputs a signal from the control circuit 103onto the transmission line 123, and receives an instruction signal fromthe receiver 210 via the transmission line 123.

The receiver 210 includes an internal circuit 111, a voltage detectionsection 112, a control signal generation section 113, an output buffer114, a signal input/output terminal 215, a signal output terminal 116,and a driving current generation circuit 117. The signal input/outputterminal 215 is a communication section which directly exchanges signalswhen the transmitter 200 performs external communications. The signaloutput terminal 215, which is connected to the other end of thetransmission line 123, receives a signal from the transmitter 200 viathe transmission line 123, and outputs an instruction signal from thedriving current generation circuit 117 onto the transmission line 123.

Since the transmitter 200 and the receiver 210 are connected via thesingle transmission line 123, it is necessary to avoid conflict betweensignal transmission from the transmitter 200 to the receiver 210 andsignal transmission from the receiver 210 to the transmitter 200. Inorder to avoid conflict, it is necessary to adjust both the signaltransmission timing between the devices and the operation timing of theconstituent elements of each device.

The signal transmission timing between the devices can be adjusted asfollows. For example, the transmitter 200 transmits a signal which is inaccordance with a test pattern signal every 1 msec, and the receiver 210sends an instruction signal to the transmitter 200 during a period inwhich no signal is being transmitted. In other words, signaltransmission and reception are performed by so-called time division.Alternatively, after sending out a signal which is in accordance with atest pattern signal onto the transmission line 123, the transmitter 200stops the operation of the control circuit 103 until receiving a controlsignal from the receiver 210.

The operation timing of the constituent elements of each device can beadjusted as follows. For example, when transmitting a signal from thetransmitter 200 to the receiver 210, an output transistor 704 inside thedriving current generation circuit 117 of the receiver 210 is turnedoff. As a result, the output of the driving current generation circuit117 takes a high impedance state, and a voltage which occurs inconnection with a signal from the control circuit 103 of the transmitter200 can be detected at the voltage detection section 112 and theinternal circuit 111. On the other hand, when transmitting aninstruction signal from the receiver 210 to the transmitter 200, outputdriving ability adjustment transistors 304 (FIG. 3) inside the controlcircuit 103 are all turned off. As a result, the output of the controlcircuit 103 takes a high impedance state, and a signal which is outputfrom the receiver 210 can be received at the reception section 104.

Hereinafter, an impedance matching process which is performed in thesignal transmission system 1 will be described. The flow of process isgenerally the same as in the flowchart of the signal transmission system1 of Embodiment 1 illustrated in FIG. 8.

In the present embodiment, the output impedance of the control circuit103 is set to a maximum value in an initial state which exists beforethe transmitter 200 begins a signal transmission (e.g., immediatelyafter the power of the transmitter 200 is activated). This is synonymousto making the driving ability minimum. Hereinafter, it is assumed thatthe input impedance on the signal input/output terminal 205 as seen fromthe transmission line 123 is substantially infinite.

Moreover, at the beginning of the impedance matching process, thereceiver 210 has taken a predetermined initial state in order to be ableto assist the process of adjusting the output impedance of thetransmitter 200. Specifically, at the driving current generation circuit117 in the receiver 210, the output transistors therein are turned off,and are retained in a high impedance state. The following descriptionassumes that the input impedance at the signal input/output terminal 215of the receiver 210 is infinite.

The output impedance adjustment sequence is as follows. First, theinternal circuit 101 of the transmitter 200 generates a test patternsignal. Based on this test pattern signal, the output buffer 102 outputsa signal which repetitively switches between a low level and a highlevel. The control circuit 103 first drives the transmission line with aminimum driving current, thus outputting a signal based on the testpattern signal.

On the other hand, the voltage detection section 112 of the receiver 210detects an initial voltage on the signal input terminal 215 of thereceiver 210 which is connected to the transmission line 123. Thedetection is performed at time tp (FIG. 6) which is delayed from ts, atwhich the reference voltage VREF1 is reached responsive to a transitionof the output from the low level to the high level.

The voltage detection section 112 determines whether the detectedvoltage value is within the optimum reception level range. If theinitial voltage detected by the voltage detection section 112 is lowerthan the reference voltages VREF2 and VREF3, as is the voltage value attime tp of the waveform 601 shown in FIG. 7( a), two F/Fs 401 and 402 inthe voltage detection section 112 output “0” and “0”. These outputsindicate that the present driving ability is too low. Upon receiving the“0”,“0” signals from the voltage detection section 112, the controlsignal generation section 113 generates in an internal counter circuit451 an instruction signal for increasing the driving ability by onestep. The control signal generation section 113 retains the instructionsignal in a retention circuit 452, and with this instruction signal,instructs the transmitter 100 to increase the driving current, via theoutput buffer 114 and the driving current generation circuit 117.

In other words, the output of the control circuit 103 is held in a highimpedance state, and the instruction signal which has been retained inthe retention circuit 452 is output via the output buffer 114 and thedriving current generation circuit 117. The output from the drivingcurrent generation circuit 117 is received by the reception section 104via the signal input/output terminal 215, the transmission line 123, andthe signal input/output terminal 205. The receiver 210 retains theoutput buffer 114 in a high impedance state, and the control circuit 103cancels the high impedance state.

The reception section 104 generates a control signal from the receivedinstruction signal. The control circuit 103 drives the transmission line121 with a driving current which is increased by one step based on thecontrol signal, thus again outputting a signal which is based on thetest pattern signal. The receiver 110 performs a process of detecting aninitial voltage on the signal input terminal 115, and repeats theprocess until entering the range defined by the reference voltages VREF2and VREF3. The subsequent process is the same as the process that hasbeen described in connection with the signal transmission system 1 ofEmbodiment 1, and therefore the description thereof is omitted. Once theinitial voltage comes into the range defined by the reference voltagesVREF2 and VREF3, the process is ended because the output impedance ofthe control circuit 103 and the impedance of the transmission line 121have matched. Note that, after completing the impedance adjustment, theoutput impedance of the driving current generation circuit 117 isretained in the high impedance state until an adjustment sequence isagain performed.

Next, a procedure by which a signal is transmitted from the controlsignal generation section 113 to the reception section 104 via thetransmission line 123 will be described.

The instruction signal which is sent out from the control signalgeneration section 113 must be correctly received at the receptionsection 104. As described above, the waveform 603 shown in FIG. 7( c) isthe optimum transmission waveform, with which most fast signaltransmission can be performed accurately. On the other hand, thewaveforms 601 and 602 require longer time until the voltage becomessettled between the reference voltages VREF2 and VRE3 than does thewaveform 603. In other words, it is slower than the signal transmissionwith the waveform 603. However, signal transmission can still beperformed correctly. As is clear from the waveforms of FIGS. 7( a) to(c), when the output impedance is small, the time until changes involtage become subsided also elapses fast, so that a signal can berapidly sent. Conversely, when the output impedance is large, it is slowbut there is a relatively high likelihood of being able to send a signalcorrectly. Note that the waveform 604 of FIG. 7( d) exhibits waveformdistortion until the voltage becomes settled between the referencevoltages VREF2 and VREF3. Therefore, it is clear that a signal cannot becorrectly transmitted.

Now, assuming that an output impedance of the control circuit 103 thatenables signal transmission with the waveform 603 shown in FIG. 7( c) isZ₃[Ω] and that output impedances which enable signal transmission withthe waveforms 602 and 601 shown in FIGS. 7( b) and (a) are Z₂[Ω] andZ₁[Ω], respectively, the relationship Z₃<Z₂<Z₁ is satisfied.

Except during the impedance adjustment sequence, the internal circuit101 of the transmitter 200 transmits a general data signal to theinternal circuit 111 of the receiver 210. It is desirable that the datasignal transmission occurs correctly and rapidly. On the other hand, thecontrol signal generation section 113 of the receiver 210 transmits aninstruction signal (control signal) to the current control signalreception section 104 of the transmitter 200. The instruction signal istransmitted via the driving current generation circuit 117 of thereceiver 210. Herein, the output impedance of the driving currentgeneration circuit 117 is not variable but fixed.

It is desirable that the instruction signal from the receiver 210 to thetransmitter 200 can be transmitted accurately and rapidly by using thewaveform 603 of FIG. 7( c). However, accuracy is to be regarded as moreimportant because, if transmission of an instruction signal can beperformed accurately, then it will be possible after an impedanceadjustment to transmit an instruction signal by using the waveform 603of FIG. 7( c). Therefore, in the case where it is impossible to use thewaveform 603 of FIG. 7( c), it is necessary to transmit an instructionsignal by using the waveform 602 shown in FIG. 7( b) or the waveform 601shown in FIG. 7( a). Note that, in the presence of a waveform distortionsuch as that of the waveform 604, it is impossible to correctly transmitan instruction signal.

Assuming that the output impedance of the control circuit 103 aftercompleting impedance adjustment is A[Ω] and that the output impedance ofthe driving current generation circuit 117 when transmitting controldata is B[Ω], the output impedance B can be determined within a range ofvalues where the relationship A<B is satisfied. In the case where B isrelatively small, it is possible to reduce the time required for theadjustment sequence. In the case where B is relatively large, even ifthere is variation in the impedance of the transmission line 123 or thelike, such variation can be absorbed, thus allowing for a greatermargin. However, the transmission of control data will be slow.Conventionally, when rapidly transmitting a signal from the transmitter200 to the receiver 210, it has been necessary to use an expensivewiring board or cable that has a highly precise impedance in order toconserve signal quality. However, according to the present invention, solong as accurate transmission of an instruction signal from the receiver210 to the transmitter 200 is guaranteed, it is possible to perform anaccurate and fast signal transmission even by using an inexpensivewiring board or cable.

Thus, Embodiments 1 and 2 related to the impedance matching processaccording to the present invention have been described. Although thepresent invention has been conveniently illustrated by limiting thenumber of transmission lines for which impedance matching is establishedto one, there is no limitation to one. For example, in the case wherethe transmission line is a plurality of buses connecting betweensemiconductor chips, it will be possible to execute the process for eachbus.

The signal transmission system is able to switch between executing theimpedance matching process of the present invention and not executingit. For example, after a transmission line is connected, if it isdetermined that both the transmitter and the receiver are able toexecute the impedance matching process of the present invention, thenthe process of the present invention is performed. If it is determinedthat the process of the present invention cannot be performed, noimpedance matching process is performed, or an impedance matchingprocess by a conventional technique is performed. Furthermore, thetransmission system may perform another predefined process.

In the description of the signal transmission systems 1 and 2 above, thetransmitter and the receiver are identified in advance. However, in thecase where two devices which are capable of both transmission andreception of signals, e.g., the PC and the hard disk drive of FIG. 1( a)are connected, it is necessary to define which one of them should be thefirst to establish impedance matching with the transmission line. Inthis case, as one parameter, the chip numbers which are kept in thesemiconductor chips may be compared in terms of magnitude, and impedancematching may be performed for the one with the smaller number first.

The signal transmission system 1 has been illustrated as such that therespective communication controllers (not shown) of the transmitter andthe receiver execute computer programs with which the process of theflowchart of FIG. 8 is realized by the whole system, thus controllingthe aforementioned process. Although the program to be executed in thetransmitter and the program to be executed in the receiver are not thesame, they may be defined, within a single program, as a process routinefor the transmitter and a process routine for the receiver. Eachcommunication controller is to recognize whether it belongs to atransmitter or a receiver, and execute the necessary process routinedepending on the situation. Such a computer program can be recorded on avariety of storage media, such as: a magnetic storage medium, e.g., aflexible disk; a semiconductor storage medium, e.g., a flash memory; andan optical storage medium, e.g., an optical disk, and also may betransmitted via electric communications lines, e.g., a network.Furthermore, a chip set containing one or more semiconductor recordingmedia in which such a computer program is stored may be constructed.

According to the present invention, in a signal transmission systemincluding a transmitter and a receiver which are connected via atransmission line, the receiver which has detected a signal from thetransmitter sends to the transmitter an instruction signal for changingthe current amount of the driving current based on the signal value ofthe detected signal. The transmitter changes the driving current basedon this signal, whereby matching can be dynamically established betweenthe output impedance of the transmitter-side driving circuit for drivingthe transmission line and the impedance of the transmission line. Sincesignal reflection and distortion due to changes in the transmission linecharacteristics can be eliminated by establishing impedance matchingwith respect to each transmission line each time a connection is made,the signal transmission system 1 can realize good and fast signaltransmission.

According to the present invention, since the signal transmissioncharacteristics of the transmission line can be adjusted, even if thereis variation in the characteristics of the transmitter and the receiver(e.g., output buffer characteristics of the semiconductor integratedcircuit) and variation in the characteristics of the transmission line(e.g., characteristics of the printed board wiring and the cable), it ispossible to make a design so that such variations can be absorbed withinthe tolerable range of signal transmission characteristics. This allowsfor a margin in the production of the semiconductor integrated circuit,printed board, and the like, whereby the production yield can beimproved.

According to the present invention, the output impedances of atransmitter and a receiver are adjusted in accordance with the impedanceof the transmission line connected thereto, whereby consumption of atransient output current until enablement of signal transmission can beadjusted. By reducing the transient output current to the bear minimum,power consumption can be reduced.

INDUSTRIAL APPLICABILITY

According to the present invention, it is possible to establishimpedance matching in transmitting a signal between, for example, homeappliance devices which are connected via a detachable cable or betweensemiconductor chips which are connected via wiring on a printed board.By dynamically establishing matching between the output impedance of adriving circuit and the impedance of a transmission line, fast signaltransmission is realized, and the transmission efficiency can beimproved. Moreover, according to the present invention, powerconsumption at the time of signal transmission can be kept to the bearminimum by being adapted to the transmission line.

1. A transmitter to be connected to a receiver via a transmission line,the transmitter composing a signal transmission system together with thereceiver, the transmitter comprising: a communication section to beconnected to a first end of the transmission line; and a driving currentcontrol section for driving the transmission line with a predeterminedamount of driving current, the driving current control section changingcurrent amount of the driving current based on a control signal,wherein, as the control signal, the communication section receives fromthe receiver being connected to a second end of the transmission line aninstruction signal for instructing whether or not to change the currentamount of the driving current, the instruction signal being generatedbased on whether a signal value detected at the second end of thetransmission line falls within a predetermined range or not.
 2. Thetransmitter of claim 1, wherein, if the signal value falls within thepredetermined range, the communication section receives as the controlsignal an instruction signal instructing to stop changing the currentamount of the driving current, and based on the control signal, thedriving current control section retains a present setting value of thecurrent amount of the driving current.
 3. The transmitter of claim 1,wherein, if the signal value is smaller than a lower limit value of thepredetermined range, the communication section receives as the controlsignal an instruction signal instructing to increase the drivingcurrent, and based on the control signal, the driving current controlsection increases the driving current.
 4. The transmitter of claim 1,wherein, if the signal value is greater than an upper limit value of thepredetermined range, the communication section receives as the controlsignal an instruction signal instructing to decrease the drivingcurrent, and based on the control signal, the driving current controlsection decreases the driving current.
 5. The transmitter of claim 1,wherein the communication section includes a first terminal connected tothe first end of the transmission line and a second terminal for beingconnected to a control signal line to receive the instruction signal,the control signal line being different from the transmission line. 6.The transmitter of claim 1, wherein, the driving current control sectionis capable of transmitting a signal by driving the transmission line;and transmission of a signal from the driving current control sectionand reception of the control signal are performed by time division. 7.The transmitter of claim 1, wherein an output impedance value when thedriving current control section drives the transmission line is smallerthan an output impedance value of the receiver outputting theinstruction signal.
 8. The transmitter of claim 1, wherein, the drivingcurrent control section is capable of transmitting a signal by drivingthe transmission line; and a rate with which the driving current controlsection transmits a signal is faster than a rate with which a signal istransmitted when the receiver outputs the instruction signal.
 9. Thetransmitter of claim 1, wherein the transmission line is detachable fromthe communication section.
 10. A receiver to be connected to atransmitter via a transmission line, the receiver composing a signaltransmission system together with the transmitter, the transmitter beingconnected to a first end of the transmission line, the receivercomprising: a communication section connected to a second end of thetransmission line, the communication section receiving a signal from thetransmission line being driven with a predetermined driving current; adetection section for detecting a signal value at the second end of thetransmission line based on the signal, and for generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; and a signal generation section for, based on thedetection signal, generating an instruction signal for instructingwhether or not to change current amount of the driving current, whereinthe communication section outputs the instruction signal to thetransmitter.
 11. The receiver of claim 10, wherein, if a detectionsignal indicating that the signal value falls within the predeterminedrange is generated by the detection section, the signal generationsection generates an instruction signal instructing to stop changing thecurrent amount of the driving current.
 12. The receiver of claim 10,wherein if a detection signal indicating that the signal value issmaller than a lower limit value of the predetermined range is generatedby the detection section, the signal generation section generates aninstruction signal instructing to increase the driving current.
 13. Thereceiver of claim 10, wherein if a detection signal indicating that thesignal value is greater than an upper limit value of the predeterminedrange is generated by the detection section, the signal generationsection generates an instruction signal instructing to decrease thedriving current.
 14. The receiver of claim 10, wherein the communicationsection includes a first terminal connected to the second end of thetransmission line and a second terminal for being connected to a controlsignal line to output the instruction signal, the control signal linebeing different from the transmission line.
 15. The receiver of claim10, wherein, the transmitter is capable of transmitting a signal bydriving the transmission line with the predetermined driving current;and reception of a signal from the transmission line and transmission ofthe instruction signal are performed by time division.
 16. The receiverof claim 10, wherein an output impedance value of the transmitterdriving the transmission line with the predetermined driving current issmaller than an output impedance value from the terminal portion to thesignal generation section.
 17. The receiver of claim 10, wherein a ratewith which a signal is transmitted when the receiver outputs theinstruction signal is slower than a rate with which the driving currentcontrol section transmits a signal by driving the transmission line. 18.The receiver of claim 10, wherein the transmission line is detachablefrom the communication section.
 19. A transmitting-end interface to beused in a transmitter to be connected to a receiving-end interface of areceiver via a transmission line, the transmitter composing a signaltransmission system together with the receiver, the transmitting-endinterface comprising: a communication section to be connected to a firstend of the transmission line; and a driving current control section fordriving the transmission line with a predetermined amount of drivingcurrent, the driving current control section changing current amount ofthe driving current based on a control signal, wherein, as the controlsignal, the communication section receives from the receiver beingconnected to a second end of the transmission line an instruction signalfor instructing whether or not to change the current amount of thedriving current, the instruction signal being generated based on whethera signal value detected at the second end of the transmission line fallswithin a predetermined range or not.
 20. The transmitting-end interfaceof claim 19, wherein the communication section includes a first terminalconnected to the first end of the transmission line and a secondterminal for being connected to a control signal line to receive theinstruction signal, the control signal line being different from thetransmission line.
 21. The transmitting-end interface of claim 19,wherein, the driving current control section is capable of transmittinga signal by driving the transmission line; and transmission of a signalfrom the driving current control section and reception of the controlsignal are performed by time division.
 22. The transmitting-endinterface of claim 19, wherein an output impedance value when thedriving current control section drives the transmission line is smallerthan an output impedance value of the receiver outputting theinstruction signal.
 23. The transmitting-end interface of claim 19,wherein, the driving current control section is capable of transmittinga signal by driving the transmission line; and a rate with which thedriving current control section transmits a signal is faster than a ratewith which a signal is transmitted when the receiver outputs theinstruction signal.
 24. A receiving-end interface to be used in areceiver to be connected to a transmitting-end interface of atransmitter via a transmission line, the receiver composing a signaltransmission system together with the transmitter, the transmitting-endinterface being connected to a first end of the transmission line, thereceiving-end interface comprising: a communication section connected toa second end of the transmission line, the communication sectionreceiving a signal from the transmission line being driven with apredetermined driving current; a detection section for detecting asignal value at the second end of the transmission line based on thesignal received at the communication section, and for generating adetection signal indicating whether the signal value falls within apredetermined range or not; and a signal generation section for, basedon the detection signal, generating an instruction signal forinstructing whether or not to change current amount of the drivingcurrent, wherein the communication section outputs the instructionsignal to the transmitter.
 25. The receiving-end interface of claim 24,wherein the communication section includes a first terminal connected tothe second end of the transmission line and a second terminal for beingconnected to a control signal line to output the instruction signal, thecontrol signal line being different from the transmission line.
 26. Thereceiving-end interface of claim 24, wherein, the transmitter is capableof transmitting a signal by driving the transmission line with thepredetermined driving current; and reception of a signal from thetransmission line and transmission of the instruction signal areperformed by time division.
 27. The receiving-end interface of claim 24,wherein an output impedance value of the transmitter driving thetransmission line with the predetermined driving current is smaller thanan output impedance value from the terminal portion to the signalgeneration section.
 28. The receiving-end interface of claim 24, whereina rate with which a signal is transmitted when the receiving-endinterface outputs the instruction signal is slower than a rate withwhich the driving current control section transmits a signal by drivingthe transmission line.
 29. An interface system comprising atransmitting-end interface to be used in a transmitter and areceiving-end interface to be used in a receiver, the transmitting-endinterface and the receiving-end interface being connected via atransmission line, the transmitter and the receiver composing a signaltransmission system, wherein the transmitting-end interface comprises: acommunication section to be connected to a first end of the transmissionline; and a driving current control section for driving the transmissionline with a predetermined amount of driving current, the driving currentcontrol section changing current amount of the driving current based ona control signal, wherein the receiving-end interface comprises: acommunication section connected to a second end of the transmissionline, the communication section receiving a signal from the transmissionline being driven with the predetermined amount of driving current; adetection section for detecting a signal value at the second end of thetransmission line based on the signal received at the communicationsection, and for generating a detection signal indicating whether thesignal value falls within a predetermined range or not; and a signalgeneration section for, based on the detection signal, generating aninstruction signal for instructing whether or not to change currentamount of the driving current, the instruction signal being generatedbased on whether a signal value detected at the second end of thetransmission line falls within a predetermined range or not, theinstruction signal to be output by the communication section of thereceiving-end interface, and wherein, as the control signal, thecommunication section of the transmitting-end interface receives fromthe receiver the instruction signal.
 30. A transmitting-end chip to beconnected to a receiving-end chip via a transmission line, thetransmitting-end chip composing a signal transmission system togetherwith the receiving-end chip, the transmitting-end chip comprising: acommunication section to be connected to a first end of the transmissionline; and a driving current control section for driving the transmissionline with a predetermined amount of driving current, the driving currentcontrol section changing current amount of the driving current based ona control signal, wherein, as the control signal, the communicationsection receives from the receiver being connected to a second end ofthe transmission line an instruction signal for instructing whether ornot to change the current amount of the driving current, the instructionsignal being generated based on whether a signal value detected at thesecond end of the transmission line falls within a predetermined rangeor not.
 31. The transmitting-end chip of claim 30, wherein thecommunication section includes a first terminal connected to the firstend of the transmission line and a second terminal for being connectedto a control signal line to receive the instruction signal, the controlsignal line being different from the transmission line.
 32. Thetransmitting-end chip of claim 30, wherein, the driving current controlsection is capable of transmitting a signal by driving the transmissionline; and transmission of a signal from the driving current controlsection and reception of the control signal are performed by timedivision.
 33. The transmitting-end chip of claim 30, wherein an outputimpedance value when the driving current control section drives thetransmission line is smaller than an output impedance value of thereceiver outputting the instruction signal.
 34. The transmitting-endchip of claim 30, wherein, the driving current control section iscapable of transmitting a signal by driving the transmission line; and arate with which the driving current control section transmits a signalis faster than a rate with which a signal is transmitted when thereceiver outputs the instruction signal.
 35. A receiving-end chip to beconnected to a transmitting-end chip via a transmission line, thereceiving-end chip composing a signal transmission system together withthe transmitting-end chip, the transmitting-end chip being connected toa first end of the transmission line, the receiving-end chip comprising:a communication section connected to a second end of the transmissionline, the communication section receiving a signal from the transmissionline being driven with a predetermined driving current; a detectionsection for detecting a signal value at the second end of thetransmission line based on the signal, and for generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; and a signal generation section for, based on thedetection signal received at the communication section, generating aninstruction signal for instructing whether or not to change currentamount of the driving current, wherein the communication section outputsthe instruction signal to the transmitter.
 36. The receiving-end chip ofclaim 35, wherein the communication section includes a first terminalconnected to the second end of the transmission line and a secondterminal for being connected to a control signal line to output theinstruction signal, the control signal line being different from thetransmission line.
 37. The receiving-end chip of claim 35, wherein, thetransmitter is capable of transmitting a signal by driving thetransmission line with the predetermined driving current; and receptionof a signal from the transmission line and transmission of theinstruction signal are performed by time division.
 38. The receiving-endchip of claim 35, wherein an output impedance value of the transmitterdriving the transmission line with the predetermined driving current issmaller than an output impedance value from the terminal portion to thesignal generation section.
 39. The receiving-end chip of claim 35,wherein a rate with which a signal is transmitted when the receiving-endchip outputs the instruction signal is slower than a rate with which thedriving current control section transmits a signal by driving thetransmission line.
 40. A chip-mounted board comprising atransmitting-end chip of and a receiving-end chip, the transmitting-endchip and the receiving-end chip being connected via the transmissionline, wherein the transmitting-end chip comprises: a communicationsection to be connected to a first end of the transmission line; and adriving current control section for driving the transmission line with apredetermined amount of driving current, the driving current controlsection changing current amount of the driving current based on acontrol signal, wherein the receiving-end chip comprises: acommunication section connected to a second end of the transmissionline, the communication section receiving a signal from the transmissionline being driven with the predetermined amount of driving current; adetection section for detecting a signal value at the second end of thetransmission line based on the signal, and for generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; and a signal generation section for, based on thedetection signal, generating an instruction signal for instructingwhether or not to change current amount of the driving current, theinstruction signal being generated based on whether a signal valuedetected at the second end of the transmission line falls within apredetermined range or not, the instruction signal to be output by thecommunication section of the receiving-end chip, and wherein, as thecontrol signal, the communication section of the transmitting-end chipreceives from the receiving-end chip the instruction signal.
 41. Animpedance matching method for setting an output impedance of atransmitter which is connected to a receiver via a transmission line andcomposes a signal transmission system together with the receiver, thetransmitter including: a communication section to be connected to afirst end of the transmission line; and a driving current controlsection for driving the transmission line, the receiver being connectedto a second end of the transmission line, the method comprising thesteps of: operating the driving current control section to drive thetransmission line with a predetermined amount of driving current;receiving, as a control signal for instructing whether or not to changethe current amount of the driving current, an instruction signalgenerated based on whether a signal value detected at the second end ofthe transmission line falls within a predetermined range or not; andchanging the current amount of the driving current based on the controlsignal.
 42. The impedance matching method of claim 41, wherein, thecommunication section includes a first terminal connected to the firstend of the transmission line and a second terminal connected to acontrol signal line, the control signal line being different from thetransmission line; and the step of receiving receives the instructionsignal at the second terminal.
 43. The impedance matching method ofclaim 41, wherein, the step of driving operates the driving currentcontrol section to transmit a signal by driving the transmission line,and wherein the method further comprises a step of performing, by timedivision, transmission of a signal from the driving current controlsection and reception of the control signal.
 44. The impedance matchingmethod of claim 41, wherein an output impedance value when the drivingcurrent control section drives the transmission line is smaller than anoutput impedance value of the receiver outputting the instructionsignal.
 45. The impedance matching method of claim 41, wherein, the stepof driving operates the driving current control section to transmit asignal by driving the transmission line; and a rate with which thedriving current control section transmits a signal is faster than a ratewith which a signal is transmitted when the receiver outputs theinstruction signal.
 46. An output impedance setting assisting methodfor, in a receiver which is connected to a transmitter via atransmission line and composes a signal transmission system togetherwith the transmitter, assisting in setting an output impedance of thetransmitter, the transmitter being connected to a first end of thetransmission line, the receiver including: a communication sectionconnected to a second end of the transmission line; and a detectionsection for detecting a signal value at a predetermined position, themethod comprising the steps of: receiving, via the communicationsection, a signal from the transmission line being driven with apredetermined driving current; detecting, by using the detectionsection, a signal value at the second end of the transmission line basedon the signal; generating a detection signal indicating whether thesignal value falls within a predetermined range or not; based on thedetection signal, determining whether or not to change the currentamount of the driving current with which the transmission line isdriven; generating an instruction signal indicating the result ofdetermination; and outputting the instruction signal to the transmittervia the communication section.
 47. The output impedance settingassisting method of claim 46, wherein, the communication sectionincludes a first terminal connected to the second end of thetransmission line and a second terminal connected to a control signalline, the control signal line being different from the transmissionline; and the step of receiving receives the instruction signal at thesecond terminal.
 48. The output impedance setting assisting method ofclaim 46, wherein, the transmitter is capable of transmitting a signalby driving the transmission line with the predetermined driving current,and wherein the method further comprises a step of performing, by timedivision, reception of a signal from the transmission line andtransmission of the instruction signal.
 49. The output impedance settingassisting method of claim 46, wherein an output impedance value of thetransmitter driving the transmission line with the predetermined drivingcurrent is smaller than an output impedance value from the terminalportion to the signal generation section.
 50. The output impedancesetting assisting method of claim 46, wherein a rate with which a signalis transmitted when the receiver outputs the instruction signal isslower than a rate with which the driving current control sectiontransmits a signal by driving the transmission line.
 51. A product of acomputer program, the computer program to be executed in a transmitterwhich is connected to a receiver via a transmission line and composes asignal transmission system together with the receiver, the transmitterincluding: a communication section to be connected to a first end of thetransmission line; and a driving current control section for driving thetransmission line, the receiver being connected to a second end of thetransmission line, the computer program comprising the steps of:operating the driving current control section to drive the transmissionline with a predetermined amount of driving current; causing thecommunication section to receive, as a control signal for instructingwhether or not to change the current amount of the driving current, aninstruction signal generated at the receiver based on whether a signalvalue detected at the second end of the transmission line falls within apredetermined range or not; and changing the current amount of thedriving current based on the control signal.
 52. The product of acomputer program of claim 51, wherein, the communication sectionincludes a first terminal connected to the first end of the transmissionline and a second terminal connected to a control signal line, thecontrol signal line being different from the transmission line; and theinstruction signal is received at the second terminal.
 53. The productof a computer program of claim 51, wherein, the driving current controlsection is capable of transmitting a signal by driving the transmissionline, and the transmitter is caused to perform, by time division,transmission of a signal from the driving current control section andreception of the control signal.
 54. The product of a computer programof claim 51, wherein an output impedance value when the driving currentcontrol section drives the transmission line is smaller than an outputimpedance value of the receiver outputting the instruction signal. 55.The product of a computer program of claim 51, wherein, the drivingcurrent control section is capable of transmitting a signal by drivingthe transmission line; and a rate with which the driving current controlsection transmits a signal is faster than a rate with which a signal istransmitted when the receiver outputs the instruction signal.
 56. Aproduct of a computer program, the computer program to be executed in areceiver which is connected to a transmitter via a transmission line andcomposes a signal transmission system together with the transmitter, thetransmitter being connected to a first end of the transmission line, thereceiver including: a communication section connected to a second end ofthe transmission line; and a detection section for detecting a signalvalue at a predetermined position, the computer program comprising thesteps of: receiving, via the communication section, a signal from thetransmission line being driven with a predetermined driving current;detecting, by using the detection section, a signal value at the secondend of the transmission line based on the signal; generating a detectionsignal indicating whether the signal value falls within a predeterminedrange or not; based on the detection signal, determining whether or notto change the current amount of the driving current with which thetransmission line is driven; generating an instruction signal indicatingthe result of determination; and outputting the instruction signal tothe transmitter via the communication section.
 57. The product of acomputer program of claim 56, wherein, the communication sectionincludes a first terminal connected to the second end of thetransmission line and a second terminal connected to a control signalline, the control signal line being different from the transmissionline; and the instruction signal is received at the second terminal. 58.The product of a computer program of claim 56, wherein, the transmitteris capable of transmitting a signal by driving the transmission linewith the predetermined driving current, and the receiver is caused toperform, by time division, reception of a signal from the transmissionline and transmission of the instruction signal.
 59. The product of acomputer program of claim 56, wherein an output impedance value of thetransmitter driving the transmission line with the predetermined drivingcurrent is smaller than an output impedance value from the terminalportion to the signal generation section.
 60. The product of a computerprogram of claim 56, wherein a rate with which a signal is transmittedwhen the receiver outputs the instruction signal is slower than a ratewith which the driving current control section transmits a signal bydriving the transmission line.